Embodiments of the invention relate generally to electronic chip package connections and, more particularly, to an electronic chip package of an electronic chip with contact pads having a minimized pitch therebetween.
Most semiconductor devices, such as bare chips, have electrical contact pads located on a top-side or active surface of the device to provide input/output (I/O) connections. As more complex devices are designed, the number of contact pads are increased and the pad pitch (i.e., the center-to-center distance between adjacent contact pads) is continually being reduced from 100 microns or so to 50 micron or less. Devices with perimeter pad pitches of 50 microns or so are often difficult to connect to when using an embedded chip interconnect technology. Chips with tighter pad pitches generally cannot be interconnected reliably or repeatedly since shorts often occur between cover pads associated the contact pads.
Embedded chip packaging technologies generally apply a first dielectric layer over a chip top surface, form vias in the dielectric layer such that they abut contact pads on the chip, and then form metal interconnections to the contact pads along the vias and metal cover pads about the via openings on a top surface of the dielectric layer. For yield and reliability issues, the metalized cover pad generally extends beyond the opening of the via. In general, the minimum contact pad pitch that can be accommodated is based upon the sum of the minimum via cover pad length and the minimum pad-to-pad tolerance. For example, a via that has an opening of twenty-five microns at chip surface may be forty microns at the top-side surface, and if the minimum metal feature is ten microns, then the metalized via cover pad diameter may need to be at least equal to the metalized via top-side opening plus twice the minimum metal feature (e.g., sixty microns). To be reliable, two adjacent metal cover pads, each generally centered over a via that is generally centered over the contact pad, should be electrically isolated from each other. As such, a gap or space is often needed between adjacent cover pads, each associated with a contact pad, to avoid shorts. It is generally understood, due to tolerances and variation in metallization, that the gap should be no less than the minimum metal feature size. That is, if the minimum feature size is ten microns, the minimum gap should be no less than ten microns. Accordingly, in the example set forth above, the minimum contact pad pitch should be no less than seventy microns. Such a minimum contact pad pitch places constraints on the design of semiconductor devices and, as technology progresses and the pad pitch of such semiconductor devices is desired to be further decreased to 50 microns or less, such a constraint is highly undesirable.
As such, it may be desirable to have a system that has aspects and features that differ from those that are currently available and that solves at least the aforementioned problems. Further, it may be desirable to have a method that differs from those methods that are currently available.